M100PFS
SoM based on Microchip’s low-power PolarFire RISC-V SoC FPGA
SoM based on Microchip’s low-power PolarFire RISC-V SoC FPGA
Discover the innovations from the embedded sector and meet experts: more than 1,100 exhibitors and numerous speakers from 52 countries will be presenting their products and service on the Embedded World 2020 trade fair in Nuremberg.
Meet ARIES Embedded in hall 3A on booth 441 from February 25 to 27. We will be happy to talk about the needs of your next generation Embedded System.
We are more than happy that our M100PF System-On-Module with Microchip Technology Inc.'s PolarFire FPGA has been nominated for "Products of the Year 2020" of Elektronik Magazine by WEKA. Our M100PF SoM optimizes the PolarFire FPGA for industrial and medical technology and extends the FPGA functionality with RAM, Flash, Clocking and additional features.
Microsemi released more details on their upcoming PolarFire SoC Family. Check out the Microsemi website for more information.
We are happy to anounce the availability of the updated MxxDK display kit for MCVEVP.
The MxxDK supports a 7" (177.80mm) display with a viewing area of 154.90mm W x 86.85mm H and a capcitive touch, as well. The frame buffer functionality is implemented based on the “VIP Frame Buffer II” IP core by Intel.
More information is available on the respective QuickStart document. Keep us posted in case you want to have it implemented using different display size, resolution, etc.
The SpiderSoM is a programmable, non-volatile solution based on Intel® MAX®10 FPGA, which enables it to deliver full-featured FPGA capabilities.
We are happy to anounce, that the Hardware Manual for the M100PF is available for download now ! Get more information about the most recent FPGA SoM based on Microsemi's PolarFire FPGAs.
RISC-V is an open-source hardware instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. Since its introduction the architecture is gaining more and more popularity in industry.
Please note our updated example for using a RISC V core on SpiderSoM and MX10 under http://www.spiderboard.org. The example shows the setup of the VectorBlox ORCA Core and the RISC-V tools, running FreeRTOS.