ARIES Embedded is proud to be present at the following event by Arrow:
Protect your future: Migrate your legacy FPGA designs to Microchip
Microchip FPGAs are an excellent choice, providing low power, instant-on, SEU immunity and security (both design and data security), with at least 20 years of product family availability. Migrating FPGA designs can be challenging.
With attendance to this seminar you will be able to:
- Rapidly assess FPGA power consumption over a wide range of ambient temperatures
- Convert example design to Microchip
- Automate design conversion using Python
- Apply constraints for placement and timing
- Implement clocks & resets
- Handle IP components
- Test & debug
| Agenda | |
|---|---|
| 08:45-09:15 | Registration and coffee |
| 09:15-09:30 | Welcome |
| 09:30-10:00 | Device and architecture overview - low power, instant-on, SEU immunity and security |
| 10:00-10:45 | Libero SoC FPGA Design flow |
| 10:45-11:00 | Coffee break |
| 11:00-12:00 | Migration Theory - Estimating power, Timing Constraints, Clocks, IP. |
| 12:00-13:00 | Lunch |
| 13:00-15:30 | Hands-on Workshop o Complimentary SMF2000 eval board |
| 15:30-16:00 | Q&A |
| 16:00 | Close |
Pre-requisites:
o Laptop with Libero SoC and free Silver license
o Python installed
o USB Micro cable for programming SMF2000
o SMF2000 will be provided by Arrow at the event
This event is for design engineers challenged with both migrating FPGAs and managing power consumption. The theory and practice of design migration will be covered, providing you with the tools and techniques you need to succeed.
Date: September 27th, 2022
Time: 08:45 - 16:00
Location: Arrow Central Europe GmbH, Frankfurter Str. 211, 63263 Neu-Isenburg
Conference Room: Neu-Isenburg