DYPLO Dynamic Process Loader - The next step in Data and Signal Acceleration
Dyplo is part of the rapidly growing ecosystem for embedded acceleration solutions. The Dyplo concept provides developers with the ability to connect various processing units and distribute and control processes with Dynamic Process Loader.
Dyplo enables you to get the maximum out of your platform of choice, achieving the most flexible and best possible technical solution for your application. With Dyplo you integrate in a transparent and easy to program way FPGA functions in your PC based software application. You can choose for a full C-to-FPGA design flow or an HDL implementation flow of your choice implementing core execution functions.
Software-like threading on FPGA fabric:
Easy-to-use software API
Hustle-free integrated DFX support
Seamless utilization of VivadoHLS
C/C++ and VHDL/Verilog support
Zynq 7000/Ultrascale+ support
Deterministic NOC on FPGA fabric
The Dyplo concept is based on streaming data transport and allows you to reuse the same FPGA logic for multiple functions over time, resulting in a decrease of FPGA sizes and thus lower power consumption.
DYPLO elegantly solves a problem of multiple programming disciplines:
- Dyplo forms a Network-on-Chip (NOC), wrapping fixed and dynamically exchangeable FPGA function blocks.
- On the processor side, DYPLO is a Linux kernel driver that interfaces with the Dyplo NOC using file I/O based data streams.
- The third aspect of Dyplo is the implementation flow to transform a software defined function block into a Dyplo wrapped FPGA function block.
- Data acquisitions
- HPS (High Performance Computing)
- FPGA controlling from host, easy design of peripherals
- Interface with dedicated hardware
- Logic verification on hardware (Hardware-in-the-Loop)
Dyplo stands for Dynamic Process Loader and is an operating system on FPGA fabric. Dyplo provides on demand reconfigurable function blocks on the FPGA, wrapped in a high-performance and effective Network-on-Chip.
Dyplo for FPGA/PC is based on a custom developed PCI Express controller core using a straightforward effecient DMA engine for high perfomance data transport between the FPGA and a host running Linux or Windows.
Applications can benefit from Dyplo when FPGA type of algorithmic acceleration is required to achieve software performance goals or manage FPGA implemented dynamic processing pipelines. Using Dyplo, you reduce the complexity of programming FPGA fabric to the level of programming GPU devices using OpenCL coding style.